1. Field of Invention
This invention generally relates to the electronic packages, particularly to flip chip packages, more particularly to flip chip joints and board to board solder joints formed by electroplated solder on the organic circuit boards.
2. Description of the Related Art
Since the introduction of the flip chip technology by IBM in the early 1960s, the flip chip devices have been mounted on an expensive ceramic substrate where the thermal expansion mismatch between the silicon chip and the ceramic substrate is less critical. In comparison with wire bonding technology, the flip chip technology is better able to offer higher packaging density (lower device profile) and higher electrical performance (shorter possible leads and lower inductance). On this basis, the flip chip technology has been industrially practiced for the past 40 years using high-temperature solder (controlled-collapse chip connection, C4) on ceramic substrates. However, in recent years, driven by the demand of high-density, high-speed and low-cost semiconductor devices for the trend of miniaturization of modern electronic products, the flip chip devices mounted on a low-cost organic circuit board (e.g. printed circuit board or substrate) with an epoxy underfill to mitigate the thermal stress induced by the thermal expansion mismatch between the silicon chip and organic board structure have experienced an obviously explosive growth. This notable advent of low-temperature flip chip joints and organic-based circuit board has enabled the current industry to obtain inexpensive solutions for fabrication of flip chip devices.
In the current low-cost flip chip technology, the top surface of the semiconductor integrated circuit (IC) chip has an array of electrical contact pads. The organic circuit board has also a corresponding grid of contacts. The low-temperature solder bumps or other conductive adhesive material are placed and properly aligned in between the chip and circuit board. The chip is flipped upside down and mounted on the circuit board, in which the solder bumps or conductive adhesive material provide electrical input/output (I/O) and mechanical interconnects between the chip and circuit board. For solder bump joints, an organic underfill encapsulant may be further dispensed into the gap between the chip and circuit board to constrain the thermal mismatch and lower the stress on the solder joints.
In general, for achieving a flip chip assembly by solder joints, the metal bumps, such as solder bumps, gold bumps or copper bumps, are commonly pre-formed on the pad electrode surface of the chip, in which the bumps can be any shape, such as stud bumps, ball bumps, columnar bumps, or others. The corresponding solder bumps (or say presolder bumps), typically using a low-temperature solder, are also formed on the contact pads of the circuit board. At a reflow temperature, the chip is bonded to the circuit board by means of the solder joints. After dispensing of an underfill encapsulant, the flip chip device is thus constructed. The typical examples of the flip chip devices using solder joints are shown in FIGS. 1 and 2. FIG. 1 is an example of the typical flip chip devices with the use of metal bumps and presolder bumps. The metal bumps 101 are formed on the electrode pads 102 of the chip 103. The presolder bumps 104 made of low-temperature solder are formed on the contact pads 105 of the organic circuit board 106. The solder joints 107 are formed at a reflow temperature sufficient to melt and reflow the presolder bumps 104. After dispensing of an underfill encapsulant 107 into the gap between the chip 103 and circuit board 106, the flip chip device 100 is thus accomplished. FIG. 2 shows another example of the typical flip chip devices without using presolder bumps. The solder bumps 201 are formed on the electrode pads 202 of the chip 203. The chip 203 is bonded to the circuit board 204 at a reflow temperature, in which the solder joints 205 are formed at the contact pads 206. After dispensing of an underfill encapsulant 207 into the gap between the chip 203 and circuit board 204, the flip chip device 200 is thus accomplished.
Currently, the most common method for formation of presolder bumps on the circuit board is the stencil printing method. Some prior proposals in relation to the stencil printing method can be referred to U.S. Pat. No. 5,203,075 (C. G. Angulas et al.), U.S. Pat. No. 5,492,266 (K. G. Hoebener et al.) and U.S. Pat. No. 5,828,128 (Y. Higashiguchi et al.). Solder bumping technique for flip chip assemblies requires design considerations regarding both bump pitch and size miniaturization. According to practical experiences, the stencil printing will become infeasible once the bump pitch is decreased below ˜0.15 millimeter. In contrast, the solder bumps deposited by electroplating offers the ability to further reduce bump pitch down to below 0.15 millimeter. The prior proposals in relation to electroplate bumps on the circuit board for flip chip bonding can be found in U.S. Pat. No. 5,391,514 (T. P. Gall et al.) and U.S. Pat. No. 5,480,835 (K. G. Hoebener et al.). Although eletroplate solder bumping on the circuit board offers finer bump pitch over stencil printing, it presents several challenges for initial implementation. For example, the solder mask layer should not be damaged during the fabrication process of solder bumps. Also, the plating and bump height uniformity should also be established. These issues were not detailed in either U.S. Pat. Nos. 5,391,514 or 5,480,835.
Accordingly, it is desirable to provide an electroplating process for fabricating solder bumps on an organic circuit board, which does not damage solder mask layers and offers good plating and bump height uniformity.